Memory-Centric Systems

We design memory systems for data-intensive computing. Our research spans CXL and tiered memory, GPU UVM and memory oversubscription, PIM/NDP, memory management, and compression and deduplication. We treat data placement, movement, and computation as a single architectural problem, especially where AI and heterogeneous computing stress conventional memory hierarchies.

Publications

  1. (Conference) TierScale: Power Management for CXL-Enabled Tiered Memory
  2. (Journal) Ember: Improving FaaS memory efficiency via judicious memory compression with Intel IAA
  3. (Conference) ReclaimX: Device-Side Memory Reclamation via Stalled GPU Execution for UVM Oversubscription
  4. (Conference) ARIADNE: Adaptive UVM Management for Efficient GPU Memory Oversubscription
  5. (Conference) Para-ksm: Parallelized Memory Deduplication with Data Streaming Accelerators
  6. (Journal) SAFE: Sharing-aware Prefetching for Efficient GPU Memory Management with Unified Virtual Memory
  7. (Journal) RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models
  8. (Journal) Cooperative Memory Deduplication with Intel® Data Streaming Accelerator
  9. (Journal) NoHammer: Preventing Row Hammer With Last-Level Cache Management
  10. (Journal) T-CAT: Dynamic Cache Allocation for Tiered Memory Systems With Memory Interleaving
  11. (Conference) IDIO: Network-Driven, Inbound Network Data Orchestration on Server Processors
  12. (Conference) InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing
  13. (Conference) GreenDIMM: OS-assisted DRAM Power Management for DRAM with a Sub-array Granularity Power-Down State
  14. (Journal) IDIO: Orchestrating Inbound Network Data on Server Processors
  15. (Patent) Method and Apparatus for detecting cache side channel attack using trusted execution environment
  16. (Patent) Device and Method for managing DRAM power
  17. (Journal) Exploiting OS-Level Memory Offlining for DRAM Power Management
  18. (Conference) Application-Transparent Near-Memory Processing Architecture with Memory Channel Network
  19. (Journal) Virtual Snooping Coherence for Multi-Core Virtualized Systems
  20. (Conference) vCache: Architectural support for transparent and isolated virtual LLCs in virtualized environments
  21. (Journal) vCache: Providing a Transparent View of the LLC in Virtualized Environments
  22. (Journal) Subspace Snooping: Exploiting Temporal Sharing Stability for Snoop Reduction
  23. (Conference) Virtual Snooping: Filtering Snoops in Virtualized Multi-cores
  24. (Conference) Subspace Snooping: Filtering Snoops with Operating System Support